1. Field of the Invention
The present invention is related to device characterization methods and circuits, and more particularly to a circuit for determining threshold voltage variation of devices within an array.
2. Description of Related Art
Threshold voltage variation has become significant as processes have shrunk. As process technologies have evolved, random doping fluctuation (RDF) has emerged as a dominant and less controllable factor in device parameter variation. RDF has the statistical effect of generating threshold voltage variations, as the number and location of dopant atoms in the channel region can vary significantly from device to device, even though the overall doping density of a process layer for the entire wafer is well-controlled. Threshold voltage “scatter” is a term used to refer to the spread of threshold voltage.
Software models can be employed to determine the effects of RDF on circuit performance; however, in order to accurately determine the actual RDF, it is typically necessary to characterize RDF using a test circuit. Threshold voltage variation due to RDF can be characterized by measuring a large number of devices typically arranged in an addressable manner in an array-type test structure. However, full characterization of an array is a time-intensive procedure, since the channel current vs. gate voltage curve must be sampled for each individual device to gather threshold voltage statistics that describe the array. There is no direct measure of threshold voltage in a device; therefore, it is generally necessary to either measure the slope of the gate voltage vs. drain current curve to extrapolate VT or estimate VT using a fixed reference current. Either of the above-mentioned methods for measuring threshold voltage require many measurements for each device in the array.
For a square array of order N, the required measurement time is N-squared proportional, and for large arrays at present, the measurements typically require cycles of more than a day to complete. As array sizes increase, the result is unacceptable delays in design turn time, especially when determining factors for a process scaling over a large range of options.
Therefore, it would be desirable to provide a characterization method and circuit for determining threshold voltage variation within arrays of devices that can reduce the characterization time while accurately providing the threshold voltage statistics for an entire array.